Tue 4 Apr 2017 13:30 - 14:15 at D0.08 - Session III

Separation of Concerns is an important aid to understand and construct large software systems. The concept of a Separation of Concerns Space (SoC Space) separates concerns from components and thereby, provides indices to structure component spaces, aids decomposition and composition.

The talk presents the concept, shows that it generalizes feature modeling, hybrid automata, context-oriented programming and other so far unrelated programming paradigms. We also define several general laws on SoC spaces that have a profound consequences for modularity and reuse. Since a SoC space provides indices to the component space, it offers techniques of index-based decomposition and composition. SoC Spaces form a new, specific and abstract form of composition system naturally supporting the principle of separation of concerns for a wide range of applications.


Uwe Aßmann holds the Chair of Software Engineering at the Technische Universität Dresden. He has obtained a PhD in compiler optimization and a habilitation on Invasive Software Composition (ISC), a composition technology for code fragments enabling flexible software reuse. ISC unifies generic, connector-,view-, and aspect-based programming for arbitrary program or modeling languages. The technology is demonstrated by the Reuseware environment, a meta-environment for the generation of software tools (http://www.reuseware.org), as well as the SkAT meta-environment based on Reference Attribute Grammars (https://bitbucket.org/svenkarol/skat/wiki/Home).

Currently, much of his research is embedded in the research centre Center for Advancing Electronics Dresden (cfAED), in which he takes part in several subprojects: orchestration of many cores (Orchestration Path), code generation for silicon-nanowire structures (Silicon Nanowire Path), and energy-adaptive software architectures (Highly-Adaptive Energy-Efficient Computing, HAEC). In the Orchestration Path, Aßmann’s group works on novel code generation techniques for many-core architectures and modern hardware structures. For Silicon Nanowires, novel hardware synthesis tools are investigated. In HAEC, Aßmann and his assistants apply ISC to energy autotuning (EAT), a technique to dynamically recompose code adapted to the required quality of service, the context of the system, and the hardware platforms.

Uwe Aßmann is also member of the 5G Lab Germany (http://www.5glab.de) and the ResUbic Lab on software for cyber-physical systems and the internet of things (http://www.resubic.org). In both labs, he works on software engineering techniques for cyber-physical systems and cloud-based robots, which present interesting challenges for context-sensitive and resource-efficient programming.

Tue 4 Apr
Times are displayed in time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

13:30 - 15:00: Session IIIModularity at D0.08
13:30 - 14:15
SoC Spaces - Indexes for Composition
Uwe AßmannTU Dresden, Germany
File Attached
14:15 - 15:00
Formal Verification for Cross-cutting Modularity
Shmuel KatzComputer Science Dept., The Technion
File Attached